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? motorola 2002 this document contains information on a new product. speci?cations and information herein are subject to change without notice . motorola semiconductor technical data HCS12BFAMILYPP rev 2.7, 17-mar-04 mc9s12b-family product brief 16-bit microcontroller designed for automotive multiplexing applications, members of the mc9s12b-family of 16 bit flash- based microcontrollers are fully pin compatible and enable users to choose between different memory and peripheral options for scalable designs. all mc9s12b-family members are composed of standard on-chip peripherals including a 16-bit central processing unit (cpu12), up to 256k bytes of flash eeprom, 8k bytes of ram, 2k bytes of eeprom, two asynchronous serial communications interfaces (sci), serial peripheral interface (spi), an input capture/output compare timer (tim), 16- channel, 10-bit analog-to-digital converter (adc), an 8-channel pulse-width modulator (pwm), one can 2.0 a, b software compatible module (mscan12) and an inter-ic bus. system resource mapping, clock generation, interrupt control and bus interfacing are managed by the lite integration module (lim). the mc9s12b-family has full 16-bit data paths throughout, however, the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems. the inclusion of a pll circuit allows power consumption and performance to be adjusted to suit operational requirements. in addition to the i/o ports available in each module, up to 22 i/o ports are available with wake-up capability from stop or wait mode. features note not all features listed here are available in all configurations. additional information about d and b family inter-operability is given in: eb386 hcs12 d-family compatibility considerations and eb388 using the hcs12 d_family as a development platform for the hcs12 b family ? 16-bit cpu12 upward compatible with m68hc11 instruction set interrupt stacking and programmers model identical to m68hc11 20-bit alu instruction queue enhanced indexed addressing ? multiplexed bus single chip or expanded 16 address/16 data wide or 16 address/8 data narrow modes external address space 1mbyte for data and program space (112 pin package only) ? wake-up interrupt inputs depending on the package option 8-bit port h 4-bit port j 8-bit port p shared with pwm ? memory options 64k, 128k, 256k byte flash eeprom 1k, 2k byte eeprom 2k, 4k and 8k byte ram f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola mc9s12b-family 2 product brief, rev 2.7, 17-mar-04 ? analog-to-digital converter 16-channels for 112 pin package, 8 channels for 80 pin package options, 10-bit resolution external conversion trigger capability ? 1m bit per second, can 2.0 a, b software compatible module five receive and three transmit buffers flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8x8bit four separate interrupt channels for rx, tx, error and wake-up low-pass filter wake-up function loop-back for self test operation ? input capture/output compare timer (tim) 16-bit counter with 7-bit prescaler 8 programmable input capture or output compare channels simple pwm mode modulo reset of timer counter 16-bit pulse accumulator external event counting gated time accumulation ? 8 pwm channels with programmable period and duty cycle (7 channels on 80 pin packages) 8-bit 8-channel or 16-bit 4-channel separate control for each pulse width and duty cycle center- or left-aligned outputs programmable clock select logic with a wide range of frequencies ? serial interfaces two asynchronous serial communications interfaces (sci) synchronous serial peripheral interface (spi) ? inter-ic bus (iic) compatible with i2c bus standard multi-master operation software programmable for one of 256 different serial clock frequencies ? sim (system integration module) crg (windowed cop watchdog, real time interrupt, clock monitor, clock generation and reset) mebi (multiplexed external bus interface) mmc (memory map and interface) int (interrupt control) bkp (breakpoints) bdm (background debug mode) ? clock generation phase-locked loop clock frequency multiplier limp home mode in absence of external clock clock monitor low power 0.5 to 16 mhz crystal oscillator reference clock ? operation frequency 32mhz equivalent to 16mhz bus speed for single chip 32mhz equivalent to 16mhz bus speed in expanded bus modes option: 50mhz equivalent to 25mhz bus speed ? internal 5v to 2.5v regulator ? 112-pin or 80-pin lqfp package i/o lines with 5v input and drive capability 5va/d converter inputs dual supply - 5v for i/o and a/d, 2.5v logic f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc9s12b-family motorola product brief, rev 2.7, 17-mar-04 3 ? development support single-wire background debug? mode (bdm) on-chip hardware breakpoints ? pin out explanations: i/o is the sum of ports capable to act as digital input or output. for 112 pin versions: port a = 8, b = 8, e = 6 + 2 input only, h = 8, j = 4, k = 7, m = 8, p = 8, s = 8, t = 8, pad = 16 input only. 22 inputs provide interrupt capability (h =8, p= 8, j = 4, irq, xirq) d for 80 pin versions: port a = 8, b = 8, e = 6 + 2 input only, j = 2, m = 6, p = 7, s = 4, t = 8, pad = 8 input only. 11 inputs provide interrupt capability (p= 7, j = 2, irq, xirq) table 1 list of mc9s12b-family members flash ram eeprom package device can sci spi iic a/d pwm tim i/o 256k 8k 2k 112lqfp mc9s12b256 1211 16ch 8ch 8ch 91 80qfp mc9s12b256 12118ch7ch8ch59 128k 4k 1k 112lqfp mc9s12b128 1211 16ch 8ch 8ch 91 80qfp mc9s12b128 12118ch7ch8ch59 64k 2k 1k 112lqfp mc9s12b64 1211 16ch 8ch 8ch 91 80qfp mc9s12b64 12118ch7ch8ch59 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola mc9s12b-family 4 product brief, rev 2.7, 17-mar-04 64k, 128k, 256k byte flash eeprom 2k, 4k, 8k byte ram input capture reset extal xtal vdd1,2 vss1,2 sci0 1k, 2k byte eeprom bkgd r/ w modb xirq noacc/ xclks system integration module (sim) vddr cpu12 periodic interrupt cop watchdog clock monitor single-wire background breakpoints pll vsspll xfc vddpll multiplexed address/data bus vdda vssa vrh vrl atd multiplexed wide bus multiplexed vddx vssx internal logic 2.5v narrow bus ppage vddpll vsspll pll 2.5v irq lstrb eclk moda pa 4 pa 3 pa 2 pa 1 pa 0 pa 7 pa 6 pa 5 test addr12 addr11 addr10 addr9 addr8 addr15 addr14 addr13 data12 data11 data10 data9 data8 data15 data14 data13 pb4 pb3 pb2 pb1 pb0 pb7 pb6 pb5 addr4 addr3 addr2 addr1 addr0 addr7 addr6 addr5 data4 data3 data2 data1 data0 data7 data6 data5 data4 data3 data2 data1 data0 data7 data6 data5 pe3 pe4 pe5 pe6 pe7 pe0 pe1 pe2 an2 an6 an0 an7 an1 an3 an4 an5 pad3 pad4 pad5 pad6 pad7 pad0 pad1 pad2 ioc2 ioc6 ioc0 ioc7 ioc1 ioc3 ioc4 ioc5 pt3 pt4 pt5 pt6 pt7 pt0 pt1 pt2 vrh vrl vdda vssa rxd txd miso mosi ps3 ps4 ps5 ps0 ps1 ps2 sci1 rxd txd pwm pwm2 pwm0 pwm1 pwm3 pp3 pp4 pp5 pp6 pp7 pp0 pp1 pp2 pix2 pix0 pix1 pix3 ecs pk3 pk7 pk0 pk1 xaddr17 ecs xaddr14 xaddr15 xaddr16 sck ss ps6 ps7 spi0 pj6 pj7 pm2 pm3 pm4 pm5 pm6 pm7 pin kwh2 kwh6 kwh0 kwh7 kwh1 kwh3 kwh4 kwh5 ph3 ph4 ph5 ph6 ph7 ph0 ph1 ph2 kwj0 kwj1 pj0 pj1 i/o driver 5v vdda vssa a/d converter 5v & ddra ddrb pta ptb ddre pte ad ptk ddrk ptt ddrt ptp ddrp pts ddrs ptm ddrm pth ddrh ptj ddrj pk2 interrupt logic clock and reset generation module voltage regulator vssr debug module vdd1,2 vss1,2 vregen vddr vssr voltage regulator 5v & i/o not all functionality shown in this block diagram is available in all versions! pix4 pix5 pk4 pk5 xaddr18 xaddr19 voltage regulator reference kwp2 kwp6 kwp0 kwp7 kwp1 kwp3 kwp4 kwp5 kwj6 kwj7 output compare can0 rxcan txcan pm0 pm1 timer an10 an14 an08 an15 an09 an11 an12 an13 pad11 pad12 pad13 pad14 pad15 pad08 pad09 pad10 ad pwm6 pwm4 pwm5 pwm7 iic sda scl f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc9s12b-family motorola product brief, rev 2.7, 17-mar-04 5 figure 1 pin assignments 112 qfp for mc9s12b-family vrh vdda pad15/an15 pad07/an07 pad14/an14 pad06/an06 pad13/an13 pad05/an05 pad12/an12 pad04/an04 pad11/an11 pad03/an03 pad10/an10 pad02/an02 pad09/an09 pad01/an01 pad08/an08 pad00/an00 vss2 vdd2 pa7/addr15/data15 pa6/addr14/data14 pa5/addr13/data13 pa4/addr12/data12 pa3/addr11/data11 pa2/addr10/data10 pa1/addr9/data9 pa0/addr8/data8 pp4/kwp4/pwm4 pp5/kpw5/pwm5 pp6/kwp6/pwm6 pp7/kwp7/pwm7 pk7/ ecs vddx vssx pm0/rxcan0 pm1/txcan0 pm2/miso0 pm3/ ss0 pm4/mosi0 pm5/sck0 pj6/kwj6/sda pj7/kwj7/scl vregen ps7/ ss0 ps6/sck0 ps5/mosi0 ps4/miso0 ps3/txd1 ps2/rxd1 ps1/txd0 ps0/rxd0 pm6 pm7 vssa vrl pwm3/kwp3/pp3 pwm2/kwp2/pp2 pwm1/kwp1/pp1 pwm0/kwp0/pp0 xaddr17/pk3 xaddr16/pk2 xaddr15/pk1 xaddr14/pk0 ioc0/pt0 ioc1/pt1 ioc2/pt2 ioc3/pt3 vdd1 vss1 ioc4/pt4 ioc5/pt5 ioc6/pt6 ioc7/pt7 xaddr19/pk5 xaddr18/pk4 kwj1/pj1 kwj0/pj0 modc/ t a ghi/bkgd addr0/data0/pb0 addr1/data1/pb1 addr2/data2/pb2 addr3/data3/pb3 addr4/data4/pb4 addr5/data5/pb5 addr6/data6/pb6 addr7/data7/pb7 kwh7/ph7 kwh6/ph6 kwh5/ph5 kwh4/ph4 xclks/noacc/pe7 modb/ipipe1/pe6 moda/ipipe0/pe5 eclk/pe4 vssr vddr reset v ddpll xfc vsspll extal xtal test kwh3/ph3 kwh2/ph2 kwh1/ph1 kwh0/ph0 lstrb/ t a glo/pe3 r/ w/pe2 irq/pe1 xirq/pe0 signals shown in bold are not available on the 80 pin package mc9s12b-family 112lqfp 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola mc9s12b-family 6 product brief, rev 2.7, 17-mar-04 figure 2 pin assignments in 80 qfp for mc9s12b-family 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 mc9s12b-family 80 qfp vrh vdda pad07/an07 pad06/an06 pad05/an05 pad04/an04 pad03/an03 pad02/an02 pad01/an01 pad00/an00 vss2 vdd2 pa7/addr15/data15 pa6/addr14/data14 pa5/addr13/data13 pa4/addr12/data12 pa3/addr11/data11 pa2/addr10/data10 pa1/addr9/data9 pa0/addr8/data8 pp4/kwp4/pwm4 pp5/kwp5/pwm5 pp7/kwp7/pwm7 vddx vssx pm0/rxcan0 pm1/txcan0 pm2/miso0 pm3/ ss0 pm4/mosi0 pm5/sck0 pj6/kwj6/sda pj7/kwj7/scl vregen ps3/txd1 px2/rxd1 ps1/txd0 ps0/rxd0 vssa vrl pwm3/kwp3/pp3 pwm2/kwp2/pp2 pwm1/kwp1/pp1 pwm0/kwp0/pp0 ioc0/pt0 ioc1/pt1 ioc2/pt2 ioc3/pt3 vdd1 vss1 ioc4/pt4 ioc5/pt5 ioc6/pt6 ioc7/pt7 modc/ t a ghi/bkgd addr0/data0/pb0 addr1/data1/pb1 addr2/data2/pb2 addr3/data3/pb3 addr4/data4/pb4 addr5/data5/pb5 addr6/data6/pb6 addr7/data7/pb7 xclks/noacc/pe7 modb/ipipe1/pe6 moda/ipipe0/pe5 eclk/pe4 vssr vddr reset v ddpll xfc v sspll extal xtal test lstrb/ t a glo/pe3 r/ w/pe2 irq/pe1 xirq/pe0 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc9s12b-family motorola product brief, rev 2.7, 17-mar-04 7 figure 3 mc9s12bx256 user configurable memory map $0000 $ffff $c000 $8000 $4000 $0400 $0800 $1000 $ff00 ext normal single chip expanded special single chip vectors vectors vectors $ff00 $ffff bdm (if active) $c000 $ffff 16k fixed flash eeprom 2k, 4k, 8k or 16k protected boot sector $8000 $bfff 16k page window sixteen * 16k flash eeprom pages $4000 $7fff 16k fixed flash eeprom 1k, 2k, 4k or 8k protected sector $2000 $3fff $0800 $0fff 2k bytes eeprom mappable to any 2k boundary $0000 $03ff 1k register space mappable to any 2k boundary mappable to any 8k boundary 8k bytes ram $2000 the ?gure shows a useful map, which is not the map out of reset. after reset the map is: $0000 - $03ff: register space $0000 - $1fff: 8k ram (only 7k visible $0400 - $1fff) $0000 - $07ff: 2k eeprom (not visible) $2000 - $3fff: 8k flash f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola mc9s12b-family 8 product brief, rev 2.7, 17-mar-04 figure 4 mc9s12bx128 user configurable memory map $0000 $ffff $c000 $8000 $4000 $0400 $0800 $1000 $3000 $ff00 ext normal single chip expanded special single chip vectors vectors vectors $ff00 $ffff bdm (if active) $c000 $ffff 16k fixed flash eeprom 2k, 4k, 8k or 16k protected boot sector $8000 $bfff 16k page window eight * 16k flash eeprom pages $4000 $7fff 16k fixed flash eeprom 1k, 2k, 4k or 8k protected sector $3000 $3fff 4k bytes ram mappable to any 4k boundary $0800 $0fff 1k bytes eeprom mappable to any 2k boundary $0000 $03ff 1k register space mappable to any 2k boundary repeated twice in the 2k space the ?gure shows a useful map, which is not the map out of reset. after reset the map is: $0000 - $03ff: register space $0000 - $0fff: 4k ram (only 3k visible $0400 - $0fff) $0000 - $07ff: 1k eeprom (not visible) $2000 - $3fff: 12k flash f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc9s12b-family motorola product brief, rev 2.7, 17-mar-04 9 figure 5 mc9s12bx64 user configurable memory map $0000 $ffff $c000 $8000 $4000 $0400 $0800 $1000 $3800 $ff00 ext normal single chip expanded special single chip vectors vectors vectors $ff00 $ffff bdm (if active) $c000 $ffff 16k fixed flash eeprom 2k, 4k, 8k or 16k protected boot sector $8000 $bfff 16k page window four * 16k flash eeprom pages $4000 $7fff 16k fixed flash eeprom 0.5k, 1k, 2k or 4k protected sector $3800 $3fff 2k bytes ram mappable to any 2k boundary $0800 $0fff 1k bytes eeprom mappable to any 2k boundary $0000 $03ff 1k register space mappable to any 2k boundary repeated twice in the 2k space the ?gure shows a useful map, which is not the map out of reset. after reset the map is: $0000 - $03ff: register space $0800 - $0fff: 2k ram $0400 - $07ff: 1k eeprom $2000 - $3fff: 12k flash f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola mc9s12b-family 10 product brief, rev 2.7, 17-mar-04 figure 6 112-pin lqfp mechanical dimensions (case no. 987) dim a min max 20.000 bsc millimeters a1 10.000 bsc b 20.000 bsc b1 10.000 bsc c --- 1.600 c1 0.050 0.150 c2 1.350 1.450 d 0.270 0.370 e 0.450 0.750 f 0.270 0.330 g 0.650 bsc j 0.090 0.170 k 0.500 ref p 0.325 bsc r1 0.100 0.200 r2 0.100 0.200 s 22.000 bsc s1 11.000 bsc v 22.000 bsc v1 11.000 bsc y 0.250 ref z 1.000 ref aa 0.090 0.160 q q q q 11 11 13 7 13 view y l-m 0.20 n t 4x 4x 28 tips pin 1 ident 1 112 85 84 28 57 29 56 b v v1 b1 a1 s1 a s view ab 0.10 3 c c2 q 2 q 0.050 seating plane gage plane 1 q q view ab c1 (z) (y) e (k) r2 r1 0.25 j1 view y j1 p g 108x 4x section j1-j1 base rotated 90 counterclockwise metal j aa f d l-m m 0.13 n t 1 2 3 c l l-m 0.20 n t l n m t t 112x x x=l, m or n r r notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. dimensions in millimeters. 3. datums l, m and n to be determined at seating plane, datum t. 4. dimensions s and v to be determined at seating plane, datum t. 5. dimensions a and b do not include mold protrusion. allowable protrusion is 0.25 per side. dimensions a and b include mold mismatch. 6. dimension d does not include dambar protrusion. allowable dambar protrusion shall not cause the d dimension to exceed 0.46. 8 3 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
mc9s12b-family motorola product brief, rev 2.7, 17-mar-04 11 figure 7 80-pin qfp mechanical dimensions (case no. 841b) notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane -h- is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums -a-, -b- and -d- to be determined at datum plane -h-. 5. dimensions s and v to be determined at seating plane -c-. 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.25 per side. dimensions a and b do include mold mismatch and are determined at datum plane -h-. 7. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.08 total in excess of the d dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. section b-b 61 60 detail a l 41 40 80 -a- l -d- a s a-b m 0.20 d s h 0.05 a-b s 120 21 -b- b v j f n d view rotated 90 detail a b b p -a-,-b-,-d- e h g m m detail c seating plane -c- c datum plane 0.10 -h- datum plane -h- u t r q k w x detail c dim min max millimeters a 13.90 14.10 b 13.90 14.10 c 2.15 2.45 d 0.22 0.38 e 2.00 2.40 f 0.22 0.33 g 0.65 bsc h --- 0.25 j 0.13 0.23 k 0.65 0.95 l 12.35 ref m 510 n 0.13 0.17 p 0.325 bsc q 07 r 0.13 0.30 s 16.95 17.45 t 0.13 --- u 0 --- v 16.95 17.45 w 0.35 0.45 x 1.6 ref s a-b m 0.20 d s c s a-b m 0.20 d s h 0.05 d s a-b m 0.20 d s c s a-b m 0.20 d s c f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
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